1. Borowik G., Łuba T., Tomaszewicz P.: On the Memory Capacity to Implement Logic  Functions, Eds. F. Pichler, R. Moreno-Díaz, A. Quesada-Arencibia, Computer Aided Systems Theory - EUROCAST 2011, vol.6928: Springer-Verlag Berlin Heidelberg 2012, Lecture Notes in Computer Science, pp. 343-350, 2012.
  2. Brayton R., Hachtel G.D., McMullen C.,  Sangiovanni-Vincentelli A.: Logic Minimization Algorithms for VLSI Synthesis. Kluwer Academic Publishers, Boston, 1984.
  3. Brzozowski J. A., Łuba T.: Decomposition of Boolean Functions Specified by Cubes. Journal of Multiple- Valued Logic and Soft Computing, Vol. 9, Old City Publishing, Inc., Philadelphia, pp. 377–417, 2003.
  4. Cong J.,  Yan K.: Synthesis for FPGAs with embedded memory blocks. In: Proc. of the 2000 ACM/SIGDA 8th International Symposium on Field Programmable Gate Arrays, pp. 75 – 82, ACM Press NY, Monterey, California 2000.
  5. Curtis H.A.: A New Approach to the Design of Switching Circuits. D. Van Nostrand Company, 1962.
  6. Hartmanis J., Stearns R. E.: Algebraic Structure Theory of Sequential Machines. Prentice-Hall, Inc., Englewood Cliffs, N. J, 1966.
  7. Hassoun S., Sasao T., Brayton R. (ed.): Logic Synthesis and Verification. Kluwer Academic Publishers, New York 2002.
  8. Hrynkiewicz E., Kania D.: Metody syntezy dedykowane dla struktur FPGA typu tablicowego. Kwartalnik Elektroniki i Telekomunikacji, 50, z. 3, pp. 325-342, 2004.
  9. Kania D.: Synteza logiczna przeznaczona dla matrycowych struktur programowalnych typu PAL. Politechnika Śląska. Zeszyty  Naukowe. Nr 1619. Gliwice 2004.
  10. Kania D.: Układy logiki programowalnej. Podstawy syntezy i sposoby odwzorowania technologicznego. Wydawnictwo Naukowe PWN, Warszawa 2012.
  11. Łuba T.: Multi-level logic synthesis based on decomposition. Microprocessors and Microsystems. 18, No 8, pp. 429-437, 1994.
  12. Łuba T., Lasocki R., Rybnik J.: An Implementation of Decomposition Algorithm and its Application in Information Systems Analysis and Logic Synthesis. In Rough Sets, Fuzzy Sets and Knowledge Discovery, W. Ziarko (Ed.). Workshops in Computing Series. Springer Verlag, pp. 458-465, 1994.
  13. Łuba T., Selvaraj H., Nowicka M., Kraśniewski A.: Balanced multilevel decomposition and its applications in FPGA-based synthesis, in Saucier G., Mignotte  A. (ed.), Logic and Architecture Synthesis, Chapman&Hall, 1995.
  14. Łuba T.: Decomposition of Multiple-Valued Functions. 25th International Symposium on Multiple-Valued Logic. Bloomington, Indiana, pp. 256-261, 1995.
  15. Łuba T, Selvaraj H.: A General Approach to Boolean Function Decomposition and its Applications in FPGA-based Synthesis. VLSI Design, Special Issue on Decompositions in VLSI Design, Vol. 3, Nos. 3-4, pp. 289-300, 1995.
  16. Łuba T., Moraga C., Yanushkevich S., Opoka M., Shmerko V.: Evolutionary Multi-Level Network Synthesis  in Given Design Style. In: Proc. IEEE 30th Int. Symp. on Multiple-Valued Logic, pp. 253-258, Portland 2000.
  17. Łuba T., Borowik G.: Synteza logiczna, Oficyna Wydawnicza PW, Warszawa 2015.
  18. De Micheli G.: Synthesis and Optimization of Digital Circuits. McGraw-Hill, New York 1994.
  19. Rawski M., Selvaraj H., Falkowski B.J., Łuba T.: Chapter XII: Significance of Logic Synthesis in FPGA-Based Design of Image and Signal Processing Systems, pp. 265–283, w B. Verma, M. Blumenstain (Ed.), Pattern Recognition Technologies and Applications: Recent Advanced, 2008.
  20. Sasao T.: Index Generation Functions, Logic Synthesis for Pattern Matching, EPFL Workshop on Logic Synthesis & Verification, Dec. 2015
  21. Sasao, T.: Memory-Based Logic Synthesis, Springer New York Dordrecht Heidelberg London, 2011.
  22. Selvaraj H., Sapiecha P., Łuba T.: Functional decomposition and its applications in machine learning and neural networks. International Journal of Computational Intelligence and Applications. World Scientific Publishing Company, Vol. 1, no. 3, pp. 259-271, Imperial College Press, 2001.
  23. Stańczyk U., Cyran K., Pochopień B.: Theory of logic circuits – volume 1 – Fundamental issues. Publishers of the Silesian University of  Technology, Gliwice 2007.
  24. Stańczyk U., Cyran K., Pochopień B.: Theory of logic circuits – volume 2 – Circuit design and analysis. Publishers of the Silesian University of  Technology, Gliwice 2007.
  25. Yanushkevich S,  Shmerko V.: Introduction to Logic Design. CRC Press, 2008.

Ostatnia modyfikacja: wtorek, 16 listopada 2021, 13:50